Cogs.Core
Features.h
1#pragma once
2#include <string>
3#include "Base.h"
4
5#ifdef _MSC_VER
6#ifdef _WIN32
7#define COGS_ARCH_X86
8#define COGS_ARCH_X86_32
9#endif
10#ifdef _WIN64
11#define COGS_ARCH_X86
12#define COGS_ARCH_X86_64
13#endif
14#endif
15
16#if (defined(__GNUC__) || defined(__clang__) || defined(__INTEL_COMPILER)) && !defined(__APPLE__)
17#ifdef __i386__
18#define COGS_ARCH_X86
19#define COGS_ARCH_X86_32
20#endif
21#ifdef __x86_64__
22#define COGS_ARCH_X86
23#define COGS_ARCH_X86_64
24#endif
25#endif
26
27
28namespace Cogs
29{
30 namespace Core
31 {
32 class Context;
33
34 enum struct CPUFeature : uint32_t {
35 None = 0,
36 All = ~0u,
37#ifdef COGS_ARCH_X86
38 Intel = (1 << 0),
39 AMD = (1 << 1),
40 SSE = (1 << 2), // Aka KNI
41 SSE2 = (1 << 3),
42 SSE3 = (1 << 4), // Aka PNI
43 SSSE3 = (1 << 5),
44 SSE4a = (1 << 6),
45 SSE41 = (1 << 7),
46 SSE42 = (1 << 8),
47 XOP = (1 << 9), // eXtended Operations
48 AVX = (1 << 10),
49 AVX2 = (1 << 11),
50 AVX512F = (1 << 12), // Foundation
51 AVX512CD = (1 << 13), // Conflict detection instructions
52 AVX512ER = (1 << 14), // Exponential and reciprocal ops
53 AVX512PF = (1 << 15), // New prefetch caps
54 AVX512BW = (1 << 16), // 8 and 16bit integer ops
55 AVX512DQ = (1 << 17), // Enhanced 32 and 64bit integer ops
56 AVX512VL = (1 << 18), // Vector length extensions
57 BMI1 = (1 << 19),
58 BMI2 = (1 << 20),
59 FMA3 = (1 << 21),
60 FMA4 = (1 << 22),
61 CMov = (1 << 23),
62 MovBE = (1 << 24),
63 PopCnt = (1 << 25),
64 LZCnt = (1 << 26),
65 TBM = (1 << 27), // Trailing bit manipulation
66 F16C = (1 << 28), // aka CVT16
67 ADX = (1 << 29) // Multi-precision add-carry extensions
68#endif
69
70 };
71
72 enum struct PlatformPreference : uint32_t
73 {
74 None = 0,
75 AsyncFetch = (1<<0),
76 BackgroundTasks = (1<<1)
77 };
78
80 inline CPUFeature operator | (CPUFeature lhs, CPUFeature rhs)
81 {
82 return static_cast<CPUFeature>(static_cast<uint32_t>(lhs) | static_cast<uint32_t>(rhs));
83 }
84
86 inline CPUFeature& operator |= (CPUFeature& lhs, CPUFeature rhs)
87 {
88 lhs = static_cast<CPUFeature>(static_cast<uint32_t>(lhs) | static_cast<uint32_t>(rhs));
89 return lhs;
90 }
91
93 inline CPUFeature operator & (CPUFeature lhs, CPUFeature rhs)
94 {
95 return static_cast<CPUFeature>(static_cast<uint32_t>(lhs) & static_cast<uint32_t>(rhs));
96 }
97
99 inline CPUFeature& operator &= (CPUFeature& lhs, CPUFeature rhs)
100 {
101 lhs = static_cast<CPUFeature>(static_cast<uint32_t>(lhs) & static_cast<uint32_t>(rhs));
102 return lhs;
103 }
104
105
106
107 class COGSCORE_DLL_API Features
108 {
109 public:
110 Features();
111
112 ~Features();
113
115 bool supported(CPUFeature featureSet) const
116 {
117 return (static_cast<uint32_t>(featureSet)& static_cast<uint32_t>(currentCPUFeatureSet)) != 0u;
118 }
119
120 bool prefers(PlatformPreference preferenceSet) const
121 {
122 return (static_cast<uint32_t>(preferenceSet)& static_cast<uint32_t>(currentPlatformPreferenceSet)) != 0u;
123 }
124
125 void setPlatformPreference(PlatformPreference preferenceSet)
126 {
127 currentPlatformPreferenceSet = preferenceSet;
128 }
129
131 void restrictTo(CPUFeature allowedSet);
132
134 std::string asString() const;
135
136 private:
137 CPUFeature detectedCPUFeatureSet = CPUFeature::None;
138 CPUFeature currentCPUFeatureSet = CPUFeature::None;
139
140#ifdef EMSCRIPTEN
141 PlatformPreference currentPlatformPreferenceSet = PlatformPreference::AsyncFetch;
142#else
143 PlatformPreference currentPlatformPreferenceSet = (PlatformPreference)((unsigned)PlatformPreference::BackgroundTasks | (unsigned)PlatformPreference::AsyncFetch);
144#endif
145 };
146
147
148
149 }
150}
bool supported(CPUFeature featureSet) const
Check if a set of features are currently supported and enabled.
Definition: Features.h:115
CPUFeature operator&(CPUFeature lhs, CPUFeature rhs)
Bitmask convenience operator.
Definition: Features.h:93
CPUFeature & operator|=(CPUFeature &lhs, CPUFeature rhs)
Bitmask convenience operator.
Definition: Features.h:86
CPUFeature operator|(CPUFeature lhs, CPUFeature rhs)
Bitmask convenience operator.
Definition: Features.h:80
CPUFeature & operator&=(CPUFeature &lhs, CPUFeature rhs)
Bitmask convenience operator.
Definition: Features.h:99
Contains all Cogs related functionality.
Definition: FieldSetter.h:23